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双语推荐:寄生电容

CMOS图像传感器信号处理中通常采用分段电容DAC产生斜坡参考电压。研究了分段电容DAC精确的电容失配及寄生与其转换精度的关系式。基于对分段电容DAC工作原理的研究,导出了电容失配及寄生模型;针对其分数桥接电容失配、各二进制电容间的失配及寄生电容问题进行了理论分析;对分段电容DAC进行非理想因素仿真,设计了一个采用分段电容DAC的10位单斜ADC并对其进行测试,仿真和测试结果均验证了理论分析的正确性。上述理论分析结果可作为分段电容DAC的设计指导。
segmented-capacitor digital analog converter( SC DAC) is usually used in CMOS image sensor to generate a ramp reference voltage. Precise relationships between conversion resolution and non-ideal factors segmented-capacitor digital analog converter are derived. These non-ideal factors consist of coupling capacitor mismatch,binary-weighted-capacitor mismatch and parasitic effects. Initially,based on the study of SC DAC operation principle,mathematical models are established. Then the effects of non-ideal factors on SC DAC are analyzed. Simulation and measurement results verify the theoretical analysis. These precise relationships serve as a guideline for the design of SC DAC.

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为提高开关电源的功率密度,提高开关电源的工作频率和减小开关电源的体积,但开关电源中寄生参数对电路的高频特性影响较大,设计了一种新型的同时消除寄生电感和寄生电容的“消除器”,以消除电容器的寄生电感和寄生电容的影响,对消除器寄生参数进行分析计算,并用 Pspice 软件对其电路进行仿真和实验验证,分析结果表明该设计能够减小滤波器电路的无源元件体积,且能较大幅度降低电路的寄生参数,电容器的高频性能得到明显改善。
To improve the switching power supply power density, improve operating frequency switching power supply and reduce the size of the switching power supply. But the larger impact of parasitic switching power supply cir﹣cuit for high-frequency characteristics,so the paper designed a new type of while eliminating the parasitic inductance and parasitic capacitance " eliminator" in order to eliminate the parasitic inductance of the capacitor and influence of parasitic capacitance,. The elimination of parasitic parameters analyzed and calculated, and its circuit simulation using Pspice software, analysis and experimental verification showed that the passive components designed to reduce the vol﹣ume of the filter circuit, and can more significant reduction circuit parasitic high-frequency capacitor performance has been significantly improved.

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本文提出利用多地层平面绕组结构,地层绕组与共模绕组实现共模电容。一方面该结构可以等效为两级 L-型低通滤波器,增加了对共模高频噪声的衰减;另一方面其等效电路中每级电容的寄生串联电感相对单地层绕组结构有所减小,从而使由寄生串联电感引起的谐振频率往高频移动,从而提高了高频性能。利用上述多地层平面绕组结构设计的集成 EMI滤波器,与改进前的集成 EMI 滤波器比较,滤波器的插入损耗由电容寄生串联电感引起的寄生谐振峰值被大大地减小,在30MHz 时,插入损耗增加了约25dB,滤波器的高频性能得到了较好的改善。另外,文中还给出了改进后平面共模集成EMI滤波器的等效电路。在与改进前的制作本成及复杂程度基本保持不变的情况下,实验结果表明该结构对改善平面集成EMI滤波器高频性能的有效性。
In this paper, a novel integrated winding arrangement is proposed, multiple ground winding layers are introduced to couple with common-mode (CM) choke windings to implement the CM capacitors. On one hand, the structure is equivalent to a two-stage L-type lowpass filter, which can largely increase the high-frequency attenuation. On the other hand, the ESL in every-stage equivalent circuit is also decreased so that the resonance frequency is shifted to higher frequency. An integrated EMI filter is designd with the novel winding structure, and the second resonance peak of transmission gain brought by the equivalent series inductance (ESL) is sharply decreased compared to the original structure to improve the high-frequency performance. At 30MHz, the insertion loss is increased by about 45dB. In order to better analyze the proposed structure, the equivalent circuit of the proposed integrated EMI filter is derived. Experiments indicate that the manufacturing cost and complexity is the same

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在版图设计过程中经常会遇到差分输出信号共模点存在偏差的问题。以带共模反馈(CMFB)结构的两级运算放大器为例,对版图分别提取寄生电容C+CC和寄生电阻R进行后仿,对比后仿结果,验证了共模偏差主要是由于寄生电阻的影响。根据后仿结果,采用Calibre软件对版图寄生电阻R进行筛选,找到了影响版图共模点偏差的主要走线,通过将该走线改为并联的形式来减小寄生电阻,使输出差分信号共模偏差由0.172 3 mV下降到15.559μV。
The common mode deviation of differential output signals is commonplace during the layout design process. A two-stage operational amplifier with common feed-back(CMFB)structure is taken for example,the parasitic capacitors C+CC and parasitic resistors R of the layout are extracted to have post-simulation,through comparison,it is proved that the common mode deviation is mainly effected by parasitic resistors. According to the result,the parasitic resistor R of layout is screened by Cali-bre,and the main line affects the common mode deviation is. The common mode deviation of the differential output signals is re-duced from 0.172 3 mV to 15.559 μV by decreasing the parasitic resistors through changing the lines into parallel connection.

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FinFET器件比主流CMOS技术表现出更多优势,如快速、高集成度、低功耗、多功能性和强扩展性,基于ISE TCAD,考虑迁移率、量子效应、载流子重组、辐射效应等的影响,建立了一种纳米FinFET器件SEE的3D仿真模型。分析了工艺掺杂浓度、栅压、粒子能量、寄生电容及技术节点等对单粒子瞬态电流的影响,并探讨了其影响机制。基于此分析,找到了一些潜在的工艺加固技术,如降低源极掺杂浓度、增加漏极和衬底的掺杂浓度、减少粒子能量、降低栅压、优化寄生电容等。
FinFET presents more advantages than current bulk CMOS technologies, such as high speed, high density, lower power, more functionality and high scalability. A 3D single event effect model of nano-scale FinFET is simulated by using ISE TCAD. The considered physical models include mobility model, quantum effect model, recombination model and radiation effect model. The effects of the doping concentration, gate voltage, ion energy, parasitic capacitor, and technologies nodes on single event transient current in FinFET are analyzed. The possible mechanisms behind these effects are also presented. The results indicate some potential hardened technologies. It includes decreasing source doping concentration, increasing drain and substrate doping concentration, reducing ion energy, upgrading gate voltage (Vg ) and optimizing parasitic capacitor.

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IGBT(Insulated Gate Bipolar Transistor)阀是柔性直流换流系统的核心,建立实用准确的IGBT模型,对于模拟电磁骚扰源具有非常重要的意义。在IGBT等效电路基础上,采用复合模型法构造IGBT宽频等效电路模型,利用PSPICE软件的模型参数提取程序Parts分别提取功率MOSFET和BJT的模型参数。在此基础上,从IGBT的导电机理出发,用二极管的势垒电容表征其内部的压控寄生电容,建立其等效电路模型,并利用IGBT数据手册和计算相结合的方式提取寄生参数,仿真其稳态、动态特性。仿真结果和厂家给出的实测结果的对比,验证了该模型的正确性。
Insulated Gate Bipolar Transistor(IGBT) valve was the core of flexible DC converter system. The establish of practical and accurate IGBT model was very important significance Forgetting ready for simulating electromagnetic disturbance source. In order to construct IGBT wide-band equivalent circuit, compound model method was used. Parts program was used to extract the parameters of MOSFET and BJT respectively. On this basis, starting from the conductive mechanism of IGBT, the equivalent circuit model was built by using the internal voltage-control ed parasitic capacitance of potential barrier capacitance diode device, and the parasitic parameters were exacted by using the way of combining IGBT data sheet and calculation, and then the steady-state and dynamic characteristic were simulated. The contrasts between simulation results and measured results manufacturer were provided, the correctness of this model was verified.

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通过磁控溅射工艺制备出三种框式薄膜电感,其中特殊磁芯电感、全磁膜电感为设计制作的具有闭合磁性回路的特殊薄膜电感,而三文治结构电感是目前流行的薄膜电感,这些电感均由下层磁芯层、下层绝缘层(聚偏二氯乙烯,厚度约为40μm)、线圈和线圈中心的磁膜、上层绝缘层和上层磁芯层组成,其差别在于磁芯结构不同。在1~3 MHz频率范围内,比较了三种电感的等效电感、寄生电容和损耗因子。结果表明:与三文治结构电感和全磁膜电感相比,特殊磁芯电感有较高的等效电感量和较小的寄生电容,但损耗较后两者高。
Three kinds of frame type thin film inductors were prepared by magnetron sputtering process. The special magnetic core inductor and the whole magnetic film inductor were designed and fabricated based on closed magnetic circuit, and the sandwich inductor was characteristic of the currently popular structure. The inductors were consisted of the lower magnetic core layer, the lower insulating layer (ingredients polyvinylidene chloride, thickness of 40μm), the coil, the magnetic film in the coil center, the upper insulating layer and the upper magnetic core layer, with different magnetic core structures. The equivalent inductance, stray capacitance, and loss factor of three kinds of inductor in 1–3 MHz frequency were compared. The results show that the special magnetic core inductor has a higher equivalent inductance, lower stray capacitance and higher power consumption than those of the other inductors.

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反相绕组法是Boost变换器传导共模噪声抑制的一个有效技术,但绕组的寄生参数在高频段对噪声抑制能力有重要影响。通过对计及反相绕组寄生参数的Boost变换器共模等效模型的深入分析,明确寄生参数中的漏感、副边分布电容与补偿电容的串联谐振频率是影响噪声抑制能力的关键因素。优化寄生参数,提高谐振频率是扩大有效频率带宽,改善噪声抑制效果的有效措施。在此基础上,提出以反相1:1变压器代替反相绕组的新方法,该方法可以极大地减小漏感和副边分布电容,提高谐振频率。实验结果表明,反相变压器法较反相绕组法的有效频率带宽及高频段的共模噪声抑制能力得到明显提高。
Anti-phase winding is an effective method to suppress the CM EMI conducted noise in Boost converter. However the parasitic parameter of the anti-phase winding has critical effect on high frequency ranges. By the detail analysis of the CM EMI equivalent model of Boost converter considering the parasitic parameter of the anti-phase winding, the key factor is confirmed which is due to the serial resonant between the leakage inductance and stray capacitance of secondary winding plus the compensated balance capacitance. Optimizing the parasitic parameters will bring the benefit to increase the resonant frequency and expend the effective bandwidth in CM noise suppression. Based on the theoretical analysis, a novel method is also proposed which use an anti-phase 1:1 transformer, instead of anti-phase winding. With the new method the leakage inductance and the stray capacitance can be controlled to decrease greatly, resulting in great increase of effective bandwidth. The result of experiment s

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提出一种调整变换器共模噪声源阻抗的方法。通过在对称式Boost变换器的耦合电感上加入平衡绕组,并在平衡绕组的末端加入平衡阻抗实现。对比不同噪声源阻抗下变换器的电磁干扰(electromagnetic interference,EMI)频谱,实验结果验证了该方法的有效性。文中所涉及的端口网络均采用散射参数(S参数)来描述,变换器的寄生电容通过有限元仿真得到。基于测得的S参数和寄生电容的仿真结果,建立平衡阻抗和EMI滤波器共模插入损耗之间的关系,并对平衡阻抗的取值进行预测。论文提出的方法可扩大噪声源端的阻抗失配,同时增大EMI滤波器的共模插入损耗。本方法的优势在于即使EMI滤波器的元件布局及其参数是固定,其性能仍可以通过调整平衡阻抗进行优化。因此,有效减少了传统EMI滤波器的重复设计过程,同时也避免了EMI滤波器的过设计问题。
This paper introduces a novel method to adjust the common mode (CM) noise impedance by adding a balanced winding in series with a balanced resistance. The balanced winding and two inductors of a balanced boost converter are wound in an E-E core, and they are taken as a six-port network. Two kinds of electromagnetic interference (EMI) filters and the six-port network are characterized using scattering parameters (S-parameters), respectively. Stray capacitances of the converter are then simulated by finite element software. Based on the measured S-parameters and the simulation results, designers will find the relationship between the balanced resistance and the CM insertion loss of an EMI filter. Then, the value of balanced resistance can be predicted. Experiments are carried out to verify this method. The proposed method can widen the impedance mismatch on the noise source side and, in turn, significantly boost the CM insertion loss of an EMI filter. Following this method, researchers w
固态功率控制器(SSPC)是集断路器线路保护功能和固态继电器可靠性于一体的智能开关装置,具有开关速度快、无触点、无电弧、可靠性高等特点。为此,以基于绝缘栅双极型晶体管(IGBT)反向串联结构为交流功率开关,研制了交流固态功率控制器。应用交流-直流真有效值转换芯片AD736,将传感器的输出直接转换为直流信号,省去了前端复杂的信号调理电路,简化了设计,并且有效地降低了寄生电容和杂散电容的影响。实验表明:设计的交流固态功率控制器原理样机满足测量精度要求,并验证了对负载反时限过流保护功能。
Solid state power controller ( SSPC) is a solid state device which is used to replace the relay’s role of switching and the breaker’s role of protection.It’s a switch matching with solid state distribution system.SSPC has the advantages of no noise, reacting quickly no electronic contact,no electronic arc,high reliability and so on.Therefore,an AC power switch based on insula-ted gate bipolar transistor(IGBT) at reverse tandem structure was presented.By replacing the complex signal processing circuit, AC-DC converter AD736 was used to convert capacitance sensor output into digital signal directly,simplify the electronics,and minimiz the interference of distributed and parasitic capacitance.Experiment result shows that the system meets the requirement of accuracy,and acquires good performance on the over-current protection of inverse-time.